Master USB 2.0, 3.0, and USB4 PCB layout. Learn differential pair routing, Type-C connector design, and signal integrity requirements for all USB generations.
| Version | Speed | Impedance | Diff Pairs | Material | Notes |
|---|---|---|---|---|---|
| USB 2.0 | 480 Mbps | 90Ω diff | 1 | FR-4 | D+/D- only |
| USB 3.0 | 5 Gbps | 90Ω diff | 2 | FR-4 | +SuperSpeed TX/RX |
| USB 3.1 | 10 Gbps | 85Ω diff | 2 | Mid-loss | Gen2 |
| USB 3.2 | 20 Gbps | 85Ω diff | 4 | Mid-loss | 2x2 lanes |
| USB4 | 40 Gbps | 85Ω diff | 4 | Low-loss | Tunneling |
| USB4 v2 | 80 Gbps | 85Ω diff | 4 | Low-loss | PAM3 |
USB 3.0 SuperSpeed requires 90Ω ±10% differential impedance for both TX and RX pairs. The legacy USB 2.0 D+/D- pair in the same connector also requires 90Ω. Use controlled impedance stackups and maintain consistent trace geometry throughout the route.
USB Type-C uses a symmetrical pinout for reversibility. Route both TX1/RX1 and TX2/RX2 pairs. A mux IC or Type-C controller handles lane switching. Keep both routing paths length-matched. The CC pins determine orientation and negotiate power/data modes.
USB 3.0 typically supports 3-5 inches of PCB trace without equalization. Longer routes require redriver/retimer ICs. USB 3.1 Gen2 (10G) is more sensitive - limit to 4 inches. Loss budget is ~8dB total at Nyquist. Use channel simulation to verify.