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PCB Glossary A-Z

Comprehensive dictionary of PCB design and signal integrity terminology. From impedance to crosstalk, learn the essential concepts for high-speed design.

A

AC Coupling

Signal Integrity

Using capacitors to block DC while passing AC signals. Common in high-speed interfaces like PCIe, USB, and HDMI to allow different DC bias levels between transmitter and receiver.

Annular Ring

Manufacturing

The copper pad area surrounding a drilled hole in a PCB. Minimum annular ring is typically 4-6 mils for reliable manufacturing.

B

Back-drill

Via Design

Removing unused via stub to reduce signal reflections and improve high-frequency performance. Essential for signals above 5 Gbps.

Bandwidth

Signal Integrity

The frequency range over which a signal or system operates effectively. Higher data rates require wider bandwidth.

C

Characteristic Impedance

Impedance

The ratio of voltage to current for a wave traveling along a transmission line. Determined by trace geometry and dielectric properties. Common values: 50Ω single-ended, 100Ω differential.

Crosstalk

Signal Integrity

Unwanted coupling between adjacent signal traces. NEXT (Near-End) occurs at the source, FEXT (Far-End) at the receiver. Minimize with proper spacing and ground shielding.

Coplanar Waveguide

Transmission Lines

Transmission line with ground planes on either side of the signal trace on the same layer. Offers good impedance control and EMI performance.

D

Dielectric Constant (Dk)

Materials

Measure of a material's ability to store electrical energy. FR-4 Dk ≈ 4.2-4.5. Lower Dk means faster signal propagation.

Differential Pair

Transmission Lines

Two traces carrying complementary signals (equal amplitude, opposite polarity). Provides noise immunity and reduced EMI. Common in USB, PCIe, HDMI, Ethernet.

Dissipation Factor (Df)

Materials

Measure of signal energy lost as heat in the dielectric. Lower Df means less loss. FR-4 Df ≈ 0.02, Megtron 6 Df ≈ 0.004.

E

Edge Rate

Signal Integrity

The speed of signal transition from low to high (rise time) or high to low (fall time). Faster edges contain higher frequency content and require more careful SI design.

Eye Diagram

Signal Integrity

Oscilloscope display showing signal quality by overlaying many bit transitions. A wide, open 'eye' indicates good signal integrity.

F

FEXT (Far-End Crosstalk)

Signal Integrity

Crosstalk measured at the far end of the victim trace. Increases with trace length and coupling. Dominant in stripline configurations.

FR-4

Materials

Standard glass-reinforced epoxy laminate for PCBs. Dk ≈ 4.2-4.5, Df ≈ 0.02. Suitable for signals up to ~3 Gbps.

Fly-by Topology

DDR Design

DDR memory routing where clock and command signals pass sequentially through each DRAM. Creates intentional skew compensated during training.

G

Ground Bounce

Power Integrity

Voltage fluctuation on ground due to simultaneous switching of multiple outputs. Causes false triggering. Mitigate with proper decoupling.

Ground Plane

Stackup

Continuous copper layer providing signal return path and shielding. Essential for controlled impedance and EMI reduction.

H

HDI (High Density Interconnect)

Manufacturing

PCB technology using microvias, fine traces, and thin materials for compact designs. Common in mobile devices and advanced packaging.

I

Impedance

Impedance

Opposition to AC current flow, measured in ohms. Controlled impedance traces are designed to specific values (50Ω, 75Ω, 100Ω) for signal integrity.

Insertion Loss

Signal Integrity

Signal power lost as it travels through a transmission line. Expressed in dB. Increases with frequency and trace length.

ISI (Inter-Symbol Interference)

Signal Integrity

When one bit affects adjacent bits due to channel bandwidth limitations. Visible as eye closure. Compensated with equalization.

J

Jitter

Signal Integrity

Timing variation in signal edges from ideal positions. Measured in picoseconds. Causes bit errors at high data rates.

L

Length Matching

Routing

Ensuring signal traces have equal electrical length for timing. Critical for parallel buses (DDR), differential pairs, and clock distribution.

LVDS (Low-Voltage Differential Signaling)

Interfaces

Differential signaling standard using 350mV swing. Low power, high speed, reduced EMI. Common in displays and high-speed data links.

M

Microstrip

Transmission Lines

Transmission line with trace on outer layer above a ground plane. Easy to manufacture but has higher radiation than stripline.

Microvia

Via Design

Small blind via (typically ≤6 mils) connecting adjacent layers. Lower inductance than through-hole vias. Used in HDI designs.

N

NEXT (Near-End Crosstalk)

Signal Integrity

Crosstalk measured at the near end (source side) of the victim trace. Dominant in microstrip. Reduce with spacing and ground shielding.

Nyquist Frequency

Signal Integrity

Half the data rate frequency. For 10 Gbps signal, Nyquist is 5 GHz. Channel must support this frequency for proper operation.

O

ODT (On-Die Termination)

DDR Design

Termination resistors integrated into IC die. Eliminates need for external resistors. Common in DDR memory interfaces.

P

PAM4

Encoding

4-level Pulse Amplitude Modulation encoding 2 bits per symbol. Doubles data rate vs NRZ. Used in 100G+ Ethernet and PCIe 6.0.

Prepreg

Materials

Partially cured fiberglass/resin material used between copper layers in PCB stackup. Becomes rigid after lamination.

R

Return Loss

Signal Integrity

Signal power reflected back to source due to impedance mismatch. Expressed in negative dB. Better than -10dB typically required.

Rise Time

Signal Integrity

Time for signal to transition from 10% to 90% of final value. Shorter rise times require higher bandwidth channels.

Rogers

Materials

Brand of high-performance PTFE-based laminates. Low loss, stable Dk. Used in RF, microwave, and high-speed digital applications.

S

S-Parameters

Signal Integrity

Scattering parameters describing high-frequency behavior. S21 is insertion loss, S11 is return loss. Used for channel characterization.

Skin Effect

Signal Integrity

AC current concentrating near conductor surface at high frequencies. Increases resistance and loss. More pronounced at higher frequencies.

Stripline

Transmission Lines

Transmission line with trace between two ground planes. Better shielding than microstrip but harder to route. Lower crosstalk.

Stub

Via Design

Unterminated trace branch causing reflections. Via stubs from unused barrel length. Remove with back-drilling for high-speed signals.

T

TDR (Time Domain Reflectometry)

Measurement

Measurement technique sending pulse down trace and analyzing reflections. Used to find impedance discontinuities and measure trace impedance.

TMDS

Interfaces

Transition Minimized Differential Signaling used in HDMI and DVI. Encoding reduces transitions for lower EMI.

Transmission Line

Signal Integrity

Trace designed with controlled impedance for high-frequency signals. Required when trace length > 1/6 of signal wavelength.

V

Via

Via Design

Plated hole connecting copper layers. Types: through-hole (all layers), blind (surface to inner), buried (inner layers only).

Via Stub

Via Design

Unused portion of through-hole via extending past signal layer. Creates resonance and reflections. Remove with back-drilling.

W

Weave Effect

Materials

Impedance variation due to fiberglass weave pattern in PCB laminate. Can cause skew in differential pairs. Mitigate with rotated routing.