Calculate characteristic impedance for inner layer PCB traces sandwiched between two ground planes. Ideal for EMI-sensitive designs requiring complete shielding.
Symmetric Stripline Cross-Section (H1 = H2)
IPC-2141A closed-form equations for symmetric and asymmetric stripline
B = H1 + H2 + T (total distance between planes)
For best accuracy, use field solver for asymmetric cases
The dual ground plane structure creates a Faraday cage around the signal trace, providing superior electromagnetic shielding compared to any other PCB transmission line.
High-speed clocks that can radiate and cause EMC failures
PCIe, USB 3.0+, Ethernet, SATA requiring tight impedance
ADC inputs, low-noise amplifier outputs, RF signals
Limited: only one shielded routing layer
Recommended: 2 shielded layers, orthogonal routing
Maximum shielding with dedicated planes
Always design symmetric stackups (top half mirrors bottom half) to prevent board warping during lamination and thermal cycling. This also ensures consistent impedance for traces on corresponding layers.
Symmetric stripline has the trace centered between two ground planes with equal dielectric thickness above and below. Asymmetric stripline has unequal distances to the two planes. Symmetric is preferred for best impedance control, but asymmetric is often used due to stackup constraints.
Stripline traces are completely enclosed between two ground planes, creating a Faraday cage that contains electromagnetic fields. This eliminates external radiation (reducing EMI emissions) and provides immunity to external noise. It's ideal for clock signals, high-speed buses, and RF traces.
Stripline signals travel through solid dielectric material only (effective Dk = substrate Dk), while microstrip signals travel through a mix of air and dielectric (lower effective Dk). Since velocity = c/√εr, higher effective Dk means slower propagation. Stripline is typically 170-180 ps/in vs 140-150 ps/in for microstrip.
Stripline requires at least 4 layers (signal + 2 grounds + routing layer). Registration between layers affects impedance consistency. Etching internal layers is more precise than outer layers, but total board thickness and lamination pressure affect final dimensions. Via aspect ratios become more critical.
Dual stripline (two signal layers sharing ground planes) is used when you need maximum EMI shielding with minimum layer count. The two signal layers can be routed orthogonally to reduce crosstalk. It's common in 6-layer boards for high-speed digital designs.
Outer layer traces with air/dielectric interface. Compare with stripline.
Design 100Ω differential pairs in shielded stripline configuration.
CPW and GCPW for RF/mmWave applications with coplanar grounds.
Complete reference of IPC impedance equations and design formulas.