Introduction to Transmission Line Theory
Transmission line theory describes how electromagnetic waves propagate along conductors. In PCB design, traces become transmission lines when their electrical length approaches the signal wavelength. Understanding this behavior is essential for designing reliable high-speed digital and RF circuits.
Why Transmission Line Theory Matters
When Transmission Line Effects Apply
Not every trace is a transmission line. The critical factor is the relationship between trace propagation delay and signal rise/fall time. When the trace delay exceeds about 1/6 of the rise time, transmission line effects become significant.
Critical Length Calculation
Critical Length Formula:
Where c = speed of light (3×10⁸ m/s), εᵣ = effective dielectric constant
Example Calculations:
Modern High-Speed Signals
With today's high-speed interfaces, nearly all traces are transmission lines:
- • DDR4/DDR5: 50-100 ps edge rates → critical length ~2-4 mm
- • PCIe Gen4/5: 35-50 ps edge rates → critical length ~1-2 mm
- • USB 3.2: 50-80 ps edge rates → critical length ~2-3 mm
- • 10G Ethernet: 30-40 ps edge rates → critical length ~1 mm
Transmission Line Parameters
A transmission line is characterized by four distributed parameters: resistance (R), inductance (L), conductance (G), and capacitance (C) per unit length. These RLGC parameters determine all transmission line behavior.
RLGC Parameters
R - Series Resistance
- • Conductor DC resistance
- • Increases with frequency (skin effect)
- • Units: Ω/m
- • Causes signal attenuation
L - Series Inductance
- • Self and mutual inductance
- • Depends on geometry
- • Units: H/m
- • Affects impedance and delay
G - Shunt Conductance
- • Dielectric leakage
- • Related to loss tangent
- • Units: S/m
- • Usually small at low frequencies
C - Shunt Capacitance
- • Between conductor and reference
- • Depends on geometry and εᵣ
- • Units: F/m
- • Affects impedance and delay
Characteristic Impedance
Characteristic impedance (Z₀) is the ratio of voltage to current for a wave traveling along the line. It depends only on the line geometry and materials, not on length or termination.
Characteristic Impedance Formulas
General Formula (Lossless):
General Formula (Lossy):
Typical Values:
Propagation and Delay
Signals travel along transmission lines at the propagation velocity, which is slower than the speed of light in vacuum due to the dielectric material.
Propagation Parameters
Propagation Velocity:
For FR-4 (εᵣ ≈ 4.4): v ≈ 0.48c ≈ 144 mm/ns
Propagation Delay:
For FR-4: approximately 6-7 ps/mm or 150-170 ps/inch
Delay Matching Implications
- 1 mm length difference ≈ 6-7 ps delay difference
- Via transitions add ~10-30 ps depending on via type
- Layer changes affect εᵣ_eff and thus propagation velocity
Reflections and VSWR
When a signal encounters an impedance discontinuity, part of the wave reflects back toward the source. The reflection coefficient quantifies this effect.
Reflection Coefficient
Reflection Coefficient (Γ):
Range: -1 (short) to +1 (open), 0 = matched
VSWR (Voltage Standing Wave Ratio):
Range: 1:1 (perfect match) to ∞:1 (complete mismatch)
Reflection Effects in Digital Signals
- Overshoot/undershoot: Can exceed IC voltage ratings
- Ringing: Multiple reflections cause oscillation
- Timing errors: Non-monotonic edges cause false triggers
- EMI: Reflections create standing waves that radiate
Termination Strategies
Termination eliminates reflections by matching the line impedance at critical points. Different termination schemes have different trade-offs.
Termination Types
Series (Source) Termination
- • Resistor at driver output
- • R = Z₀ - R_driver
- • Low power consumption
- • Half amplitude at receiver initially
- • Works for point-to-point
Parallel (Load) Termination
- • Resistor at receiver
- • R = Z₀
- • Full amplitude immediately
- • Higher power (DC path)
- • Good for multi-drop buses
Thevenin Termination
- • Pull-up and pull-down resistors
- • Sets DC bias point
- • 2R each for Z₀ parallel
- • Higher power than parallel
- • Good for biased signals
AC (RC) Termination
- • Series R-C at receiver
- • Blocks DC, terminates AC
- • Low power consumption
- • Limited low-frequency response
- • Good for periodic signals
PCB Transmission Line Structures
Different PCB routing structures have different impedance characteristics and are suited to different applications.
Common PCB Transmission Line Types
Microstrip
Trace on outer layer with ground plane below. Most common structure.
- • Higher impedance for given width
- • Exposed to environment (EMI concerns)
- • Easier to probe/debug
- • εᵣ_eff < εᵣ (air above trace)
Stripline
Trace between two ground planes (internal layer).
- • Better shielding, lower EMI
- • Lower impedance for given width
- • εᵣ_eff = εᵣ (fully embedded)
- • Harder to access for debug
Coplanar Waveguide
Trace with ground planes on same layer (with or without ground below).
- • Good for RF and high-speed
- • Easy ground access for vias
- • Lower crosstalk to adjacent traces
- • More PCB area required
Differential Transmission Lines
Differential signaling uses two complementary signals. The differential pair has different impedance modes that must be understood for proper design.
Differential Impedance Modes
Differential Mode (Zdiff):
Where k = coupling coefficient. Tighter coupling → lower Zdiff.
Common Mode (Zcm):
Important for common-mode noise immunity.
- Maintain constant spacing throughout the differential pair route
- Match trace lengths within the pair to <5% of rise time
- Keep differential pairs away from single-ended signals
Loss Mechanisms
Signal attenuation in PCB transmission lines comes from conductor losses (resistive) and dielectric losses. Both increase with frequency.
Loss Components
Conductor Loss
- • DC resistance of trace
- • Skin effect at high frequency
- • Surface roughness effect
- • Increases as √f
Dielectric Loss
- • Proportional to loss tangent (tan δ)
- • Increases linearly with frequency
- • Dominates at very high frequencies
- • FR-4: tan δ ≈ 0.02
Loss Mitigation
- Use wider traces (lower resistance)
- Choose low-loss dielectrics (tan δ < 0.005)
- Specify smooth copper for high-speed layers
- Minimize trace length
Simulation Methods
Transmission line simulation predicts signal behavior before fabrication. Different simulation approaches serve different purposes.
Simulation Approaches
2D Field Solvers
- • Calculate Z₀, delay, coupling
- • Fast, good for initial design
- • Assumes uniform cross-section
- • Examples: Saturn, Polar SI
3D EM Simulation
- • Full electromagnetic analysis
- • Handles discontinuities, vias
- • Computationally intensive
- • Examples: HFSS, CST
SPICE Simulation
- • Time-domain waveforms
- • Uses extracted models
- • Eye diagram analysis
- • Examples: HyperLynx, SIwave
IBIS Modeling
- • IC driver/receiver behavior
- • Non-proprietary format
- • Used with channel models
- • IBIS-AMI for SerDes
Transmission Line Design Rules
Essential Design Rules
- Control impedance to ±10% or better
- Terminate all transmission lines properly
- Minimize impedance discontinuities
- Route over continuous reference planes
- Add ground vias at layer transitions
- Match lengths within differential pairs
- Use proper via design for high-speed
- Simulate critical nets before layout
Key Takeaways
- Treat traces as transmission lines when length exceeds critical length
- Characteristic impedance depends on geometry and materials, not length
- Impedance discontinuities cause reflections that degrade signals
- Proper termination eliminates reflections
- Differential pairs require attention to both differential and common mode
- Losses increase with frequency—consider for long traces
Related Calculators
Use our transmission line calculators: