What is the difference between Microstrip and Stripline?

Microstrip is an outer-layer trace separated from a single ground plane. It propagates faster but radiates more EMI. Stripline is an inner-layer trace sandwiched between two ground planes, offering better shielding but slower propagation due to being fully immersed in dielectric.

How does the Skin Effect impact my design?

At frequencies above 1GHz, current crowds to the outer surface (skin) of the conductor. This reduces the effective cross-sectional area, increasing resistance and signal loss (attenuation). Using HVLP (smooth) copper helps mitigate this.

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Parameters

Target Z0

Trace Width (W)

mil

Dielectric H (H)

mil

Cu Thick (T)

mil

Cu Roughness

Freq (1 GHz)

Analysis & Check

DFM Check

W/S:4/4mil

Tol:±10%

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Demo

Sample output

Design meets IPC Class 2 requirements

Impedance within ±5% of 50Ω target

Trace width compatible with processes

Consider via stitching for transitions

DFM Warnings Tips

Results

Characteristic Impedance

Single-Ended

Z-se

56.6Ω

+13.1% vs Target (50Ω)

DFM OK

Insertion Loss

@ 1 GHz

0.208

dB/inch

Delay

146.8 ps/in

Inductance

8.30 nH/in

Capacitance

2.60 pF/in

Engineering Cheat Sheets

Common Protocols

USB 2.0

Loose tolerance

90Ω Diff

±15%

USB 3.x

Critical length matching

90Ω Diff

±10%

PCIe Gen3/4

Low loss material req

85Ω Diff

±10%

DDR4 Data

Length match by Byte lane

40-50Ω SE

±5%

Ethernet

Magnetics coupling

100Ω Diff

±15%

Material Selection Guide

Standard FR-4 (Tg 130-150)
Low cost. Good for digital <1GHz. High loss tangent (Df ~0.02).
High Tg FR-4 (Tg 170+)
Reliable for multi-layer (>6L). Isola 370HR.
Low Loss / High Speed
Required for 10Gbps+. Megtron 6, Rogers 4350B. Low Df (~0.002).

Fabrication Limits (DFM)

Min Trace/Space (Std)4/4 mil

Min Trace/Space (Adv)3/3 mil

Min Drill (Mechanical)8 mil (0.2mm)

Min Laser Drill (HDI)3-4 mil

Aspect Ratio (Via)8:1 (Std), 10:1 (Adv)

Pro Tip: Always keep traces at least 2H (2x dielectric height) away from plane edges to prevent impedance discontinuity.

Engineering Fundamentals

Impedance Basics for PCB Design

Essential knowledge for signal integrity engineers. Master these concepts to design reliable high-speed circuits.

What is Characteristic Impedance (Z₀)?

Characteristic impedance is the ratio of voltage to current for a wave traveling along a transmission line. It depends on the physical geometry of the trace (width, thickness, height above ground plane) and the dielectric constant (Dk) of the PCB material. For a lossless line, Z₀ = √(L/C), where L is inductance per unit length and C is capacitance per unit length.

50Ω

Single-ended digital signals, RF

75Ω

Video, cable TV, broadcast

100Ω

Differential pairs (USB, HDMI, PCIe)

Key Impedance Formulas

Microstrip Impedance

Z₀ = (87/√(εᵣ+1.41)) × ln(5.98H/(0.8W+T))

Approximation for outer layer traces. Valid when W/H > 0.1 and εᵣ < 16.

εᵣDielectric constant (Dk)

HHeight to ground plane

WTrace width

TTrace thickness

Stripline Impedance

Z₀ = (60/√εᵣ) × ln(4H/(0.67π(0.8W+T)))

For inner layer traces between two ground planes. Better EMI shielding.

εᵣDielectric constant

HTotal dielectric height

WTrace width

TTrace thickness

Propagation Delay

tpd = 85 × √(0.475εᵣ + 0.67) ps/in

Time for signal to travel one inch. Critical for timing analysis.

tpdPropagation delay

εᵣEffective dielectric constant

Differential Impedance

Zdiff = 2 × Z₀ × (1 - k)

For differential pairs. k is the coupling coefficient between traces.

ZdiffDifferential impedance

Z₀Single-ended impedance

kCoupling coefficient (0-1)

Skin Depth

δ = √(ρ/(π×f×μ))

Depth at which current density drops to 37%. Affects high-frequency loss.

δSkin depth

ρResistivity (copper: 1.68×10⁻⁸ Ω·m)

fFrequency in Hz

Via Inductance

L = 5.08h[ln(4h/d) + 1] nH

Johnson formula for via inductance. Critical for power integrity.

hVia height in inches

dVia diameter in inches

LInductance in nH

Quick Reference Tables

Common PCB Materials

Material	Dk	Df	Use Case
FR-4 Standard	4.2-4.5	0.02	General purpose, <3Gbps
FR-4 High Tg	4.2-4.4	0.018	Lead-free, high temp
Isola 370HR	4.04	0.021	High reliability
Megtron 6	3.4	0.002	High-speed, 25Gbps+
Rogers 4350B	3.48	0.0037	RF/Microwave to 10GHz
Rogers 4003C	3.55	0.0027	Low-cost RF

Standard Impedance Targets

Interface	Z₀ (SE)	Zdiff	Notes
DDR4/DDR5	40Ω	80Ω	±10% tolerance
USB 2.0	45Ω	90Ω	±10%
USB 3.x/4	45Ω	85Ω	±10%
PCIe Gen3/4/5	50Ω	85Ω	±10%
HDMI 2.x	50Ω	100Ω	±10%
Ethernet 1G	50Ω	100Ω	±10%
SATA	50Ω	100Ω	±15%

Copper Weight Conversion

Weight (oz)	Thickness (mil)	Thickness (μm)	Current (A/mm)
0.5 oz	0.7 mil	17.5 μm	~3A
1 oz	1.4 mil	35 μm	~6A
2 oz	2.8 mil	70 μm	~12A
3 oz	4.2 mil	105 μm	~18A

Skin Depth vs Frequency

Frequency	Skin Depth	Effect
100 MHz	6.6 μm	Minimal impact
1 GHz	2.1 μm	Starts affecting 0.5oz
5 GHz	0.93 μm	Significant loss
10 GHz	0.66 μm	Use smooth copper
25 GHz	0.42 μm	Critical - HVLP required

Microstrip vs Stripline Comparison

Microstrip

Outer layer trace

Faster propagation (≈6.4 in/ns for FR-4)
Easier to probe and debug
Lower manufacturing cost
Higher EMI radiation
More susceptible to crosstalk

Stripline

Inner layer trace

Excellent EMI shielding
Lower crosstalk between traces
More consistent impedance
Slower propagation (≈5.8 in/ns)
Harder to access for testing

Pro Tips for Impedance Control

3W Rule

Keep trace spacing ≥3× trace width to minimize crosstalk. For critical signals, use 5W.

Return Path

Always ensure a continuous ground plane beneath high-speed traces. Avoid splits and slots.

Length Matching

For DDR, match data lines within ±10mil. Use serpentine routing on shorter traces.

Via Stubs

Back-drill vias for >10Gbps signals. Stubs cause reflections at λ/4 frequency.

Engineering Intelligence

Why Engineers Trust ImpedanceCalculator

High-fidelity physics engines combined with AI to solve signal integrity problems in seconds.

Real-Time Precision Physics

IPC-2141 compliant solver gives instant feedback on impedance, inductance, and capacitance.

Instant Feedback
IPC-2141 Compliant
Microstrip & Stripline

100 Ω

Real-time Calculation

NarrowWide

AI-Powered Analysis

Integrated AI analyzes geometry for manufacturing risks and physics limitations.

Detects Acid Traps
Warns of High Loss
Optimizes Stackup

AI Detection

Acid Trap Risk

AI Detection

Impedance OK

Frequency Dependent Loss

Calculate insertion loss across your target frequency range for signal integrity.

Dielectric Loss (Df)
Skin Effect Loss
Roughness Modeling

Insertion Loss (dB/in)

1 GHz10 GHz20 GHz

10k+

Calculations / Day

99.9%

Accuracy

500+

Materials

IPC-2141

Compliant

Frequently Asked Questions

Why is 50Ω the standard impedance?

50Ω is a historical compromise between high power handling (30Ω) and lowest signal attenuation (77Ω) for coaxial cables. It has since become the standard for RF and high-speed digital interfaces because it balances power transfer efficiency with practical manufacturing tolerances.

What is the difference between Dk (Dielectric Constant) and Df (Loss Tangent)?

Dk affects impedance and signal velocity - higher Dk means narrower traces for 50Ω and slower signals. Df determines dielectric loss at high frequencies. For signals above 5Gbps, choose materials with Df < 0.01 (like Megtron 6) instead of standard FR-4 (Df ≈ 0.02).

How does 'Skin Effect' impact my design?

At high frequencies (>1GHz), current flows mainly on the conductor surface. At 10GHz, skin depth is only 0.66μm in copper. This increases AC resistance and loss. Use smooth (HVLP) copper and consider wider traces for high-frequency designs.

What impedance tolerance should I specify?

Standard tolerance is ±10% for most digital signals. For critical RF applications, ±5% may be required but increases cost. Always consider that impedance varies with temperature (approximately +0.1%/°C for FR-4) and manufacturing process variations.

How do vias affect signal integrity?

Vias add inductance (typically 0.5-1.5nH) and capacitance, causing impedance discontinuity. For high-speed signals: use smaller drill sizes (8-10mil), back-drill stubs, add ground vias nearby, and minimize via count in critical paths.

When should I use differential signaling?

Use differential pairs for: high-speed serial links (>1Gbps), long traces (>6 inches), noisy environments, or when crossing between boards. Benefits include better noise immunity, lower EMI, and the ability to use lower voltage swings.

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